Tengen 800002


Tech Specs:

Max. 64K PRG ROM.
Max. 64K CHR ROM.
MIMIC-1 mapper.


This is one of three Tengen boards that use the MIMIC-1 chip.
Seems to be Tengen's answer to the MMC3. This chip operates quite similar to it, but
is missing the IRQ counter and can only access up to 128K of PRG and 64K of CHR.
Mirroring is hard-wired on the PCB.

                         MIMIC-1 pinout (marked 337001)
                    Chip is packaged in a standard 28 pin DIP

                                  |          |
                    PRG A14 (n) - |01      28| - PRG A15 (r)
                    PRG  A0 (s) - |02      27| - PRG A14 (r)
                    PRG  D5 (s) - |03      26| - M2
                    PRG  D0 (s) - |04      25| - PRG A13 (r)
                    PRG  D4 (s) - |05      24| - PRG A13 (n)
                    PRG  D1 (s) - |06      23| - PRG A16 (r)
                            GND - |07      22| - PRG /CE (r)
                    PRG  D3 (s) - |08      21| - +5V
                    PRG  D2 (s) - |09      20| - CHR A13 (r)
                    PRG /CE (n) - |10      19| - CHR A11 (r)
                    PRG R/W (n) - |11      18| - CHR A10 (r)
                    CHR A15 (r) - |12      17| - CHR A10 (n)
                    CHR A14 (r) - |13      16| - CHR A11 (n)
                    CHR A12 (r) - |14      15| - CHR A12 (n)
                                  |          |

(r) - this pin connects to the ROM chips only
(n) - this pin connects to the NES connector only
(s) - this pin is shared with the NES connector and ROM chips


8001h, 8000h

Register 8000h is the "control" register, while 8001h is the "data" register.
First, a byte is written into 8000h to select the desired bank register(s).
Then, the desired bank number can be written into 8001h.


7  bit  0
xxxx xMMM

M: Mode bits

000b 0 - Select 2 1K CHR ROM pages at 0000h in PPU space
001b 1 - Select 2 1K CHR ROM pages at 0800h in PPU space
010b 2 - Select 1K CHR ROM page at 1000h in PPU space
011b 3 - Select 1K CHR ROM page at 1400h in PPU space
100b 4 - Select 1K CHR ROM page at 1800h in PPU space
101b 5 - Select 1K CHR ROM page at 1C00h in PPU space
110b 6 - Select 8K PRG ROM page at 8000-9FFFh
111b 7 - Select 8K PRG ROM page at A000-BFFFh

Notes:  CPU space C000-FFFFh is fixed to the last 16K of the ROM.  Mirroring is hardwired
on the cart board.  No other registers than 8000/8001h are used by the chip.  This is basically
a super stripped down MMC3.

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